Product category:
Oscilloscopes
News Release from: TTi (Thurlby Thandar Instruments) | Subject: Stanford Research Systems CG635
Edited by the Laboratorytalk Editorial
Team on 19 January 2007
Low-jitter clock generator produces DC
to 2.05GHz
The Stanford Research Systems CG635 is a low-jitter clock generator which can provide a wide range of clean, precise clocks for the most critical timing requirements
The Stanford Research Systems CG635, now available in the UK from TTi (Thurlby Thandar Instruments), is ideally suited to demonstrating a system's performance with a nearly ideal clock, and for understanding a system's susceptibility to a compromised clock The CG635 has the frequency range, precision, stability, and jitter-free performance needed to fulfil all such clock requirements
This article was originally published on Laboratorytalk on 4 Jun 2001 at 8.00am (UK)
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The instrument generates extremely stable square-wave clocks between 1uHz and 2.05GHz.
Its high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network.
Clean clocks are critical in systems that use high-speed ADCs or DACs.
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Spurious clock modulation and jitter create artefacts and noise in acquired signals and in reconstructed waveforms.
Clean clocks are also important in communications systems and networks.
Jitter, wander, or frequency offsets can lead to high bit error rates, or to a total loss of synchronisation.
The CG635 can provide the clean, stable clocks required for the most critical applications.
The CG635 has several clock outputs.
The front-panel Q and -Q outputs provide complementary square waves at standard logic levels (ECL, PECL, LVDS or +7dBm).
The square-wave amplitude may also be set from 0.2V to 1.0V, with an offset between -2V and +5V.
These outputs operate from DC to 2.05GHz, have transition times of 80ps and a source impedance of 50ohms, and are intended to drive 50-ohm loads.
Output levels double when these outputs are unterminated.
The front-panel CMOS output provides square waves at standard logic levels.
The output may also be set to any amplitude from 0.5V to 6.0V.
The CMOS output has transition times of less than 1ns and operates at up to 250MHz.
It has a 50-ohm source impedance and is intended to drive high impedance loads at the end of any length of 50-ohm coax cable.
A rear-panel RJ-45 connector provides differential square-wave clocks on twisted pairs at RS-485 levels (up to 105MHz) and LVDS levels (up to 2.05GHz).
This output also provides +/-5VDC power for optional line receivers (CG640 to CG649).
The clock outputs have 100-ohm source impedances and are intended to drive shielded CAT-6 cable with 100-ohm terminations.
The differential clocks may be used directly by the target system, or with optional line receivers that provide complementary logic outputs on SMA connectors.
The standard crystal timebase has a stability of better than 5ppm.
The CG635's 10MHz timebase input allows the instrument to be phase-locked to an external 10MHz reference.
The 10MHz output may be used to lock two CG635s together.
The clock phase can be adjusted with high precision.
The phase resolution is 1( for frequencies above 200MHz, and increases by a factor of ten for each decade below 200 MHz, with a maximum resolution of one nano-degree.
This allows clock edges to be positioned with a resolution of better than 14ps at any frequency between 0.2Hz and 2.05GHz.
The timing of clock edges can be modulated over +/-5ns via a rear-panel time-modulation input.
The input has a sensitivity of 1ns/V and a bandwidth from DC to over 10kHz, allowing an analogue signal to control the phase of the clock output.
This feature is very useful for characterising a system's susceptibility to modulation and jitter.
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